The present invention relates to digital signal processing (DSP) in general, and speech coding using DSP in particular.
A DSP (digital signal processor) is a processor that has a special architecture so that serial processes, namely multiply and accumulate, are faster than those same processes in other processors, such as a CPU (central processing unit). Digital signal processors are used in applications such as cellular phones, fax machines and modems. The architecture of different digital signal processors is customized for use in a particular application. The application includes a software program that calls the specific commands of a particular DSP.
One of the applications for which a DSP could be used is speech coding, in which an analog speech signal is converted to a compressed digital signal. There are several speech-coding techniques available. The technique of code-excited linear predictive (CELP) speech coding is well known in the art, as discussed in the chapter 12, section 10.3 of the TMS320C54x Preliminary User""s Guide from Texas Instruments Incorporated of Dallas, Texas, USA.
Reference is now made to FIG. 1, which is a schematic block diagram illustration of a prior art CELP-based speech coder. An input speech signal 10 is compared to pre-determined, compressed digital signals, which are stored in a dynamic array, known as a codebook 12. The codebook 12 can be likened to dictionary of sounds, where each sound is digitized, compressed and stored as a code vector 14. The optimum vector 16, which best matches the input speech signal 10 according to a certain criterion, is selected in what is known as a xe2x80x9ccodebook searchxe2x80x9d. An application using the CELP speech coding technique then transmits the compressed digital signal of the optimum vector 16 instead of the input analog speech signal 10.
Samples of a subframe of the input speech signal 10 are passed through a weighting filter 18, thereby producing N weighted input speech samples p(n), n=0, . . . , Nxe2x88x921, where N is the number of samples in the subframe.
In order that the transmitted signal sound as close as possible to real speech, the signal transmitted is actually an amplified, weighted, and synthesized version of the optimum vector 16. It is customary in the art to represent the codebook 12 by a collection of shape vectors si (n) and a collection of gain factors gj, where i is the index of the shape vector and j is the index of the gain factor in the codebook 12. Prior to comparison with p(n), the shape vector si (n) is passed through the amplifier 20, and then through a synthesis and weighting filter 22, the output of which is gjvi(n), where gj is the jth gain factor, and vi(n) is the weighted, synthesized version of the shape vector si(n).
When p(n) is compared to gjvi(n), then the error in substituting the amplified, weighted, synthesized code vector for the input speech is minimized for the optimum vector 16 which maximizes the expression given in Equation (1):
ci2/Gi,xe2x80x83xe2x80x83(1)
where ci is a cross-correlation variable of the weighted, synthesized code vector with the weighted input speech, given by             c      i        =                  ∑                  n          =          0                          N          -          1                    ⁢              xe2x80x83            ⁢              p        ⁢                  xe2x80x83                ⁢                              (            n            )                    ·                      v            i                          ⁢                  xe2x80x83                ⁢                  (          n          )                      ,
and Gi is an energy variable given by       G    i    =            ∑              n        =        0                    N        -        1              ⁢          xe2x80x83        ⁢                  v        i        2            ⁢              xe2x80x83            ⁢                        (          n          )                .            
Then for the optimum vector 16 whose index i has the value opt, the gain factor is given by       g    opt    =            ∑              n        =        0                    N        -        1              ⁢          xe2x80x83        ⁢          p      ⁢              xe2x80x83            ⁢                        (          n          )                ·                  v          opt                    ⁢              xe2x80x83            ⁢                        (          n          )                /                              ∑                          n              =              0                                      N              -              1                                ⁢                      xe2x80x83                    ⁢                                    v              opt              2                        ⁢                          xe2x80x83                        ⁢                                          (                n                )                            .                                          
The criterion for choosing the optimum vector 16 can be written as in Equation 2:
ci2xc2x7Goptxe2x89xa6eopt2xc2x7Gi,xe2x80x83xe2x80x83(2)
where ci and copt are the cross-correlation variables of the ith code vector and the optimum vector 16, respectively, with the weighted input speech, and Gi and Gopt are the energy variables of the ith code vector and the optimum vector 16, respectively. The variables ci2 and Gi are the parameters of the ith code vector upon which a 1-dimensional codebook search is based.
Reference is now made to FIG. 2, which is a schematic flowchart illustration of a prior art method for a standard codebook search, to be used with any processor. In the initialization step 100, the index i in the codebook is set to 1, copt2 is set to c02, Gopt is set to G0, and the index opt of the optimum vector is set to 0. Then a loop 102 of the codebook search begins. There are three multiplication steps: Gi by copt2 (step 104), then ci by ci (step 106), then ci2 by Gopt (step 108). Then there is an accumulation step, in which copt2xc2x7Gi is subtracted (step 110) from ci2xc2x7Gopt. The condition ci2xc2x7Goptxe2x88x92copt2xc2x7Gixe2x89xa60 is tested (step 112), and if satisfied, then a new optimum vector has been found, and an inner loop 114 entered. In that case, the index opt is set (step 116) to the current value of i, the value ci2 is stored (step 118) as the new copt2, and the value Gi is stored (step 120) as the new Gopt. Note that the inner loop 114 is executed only when a new optimum vector has been found. When the inner loop 114 is completed, or when the condition ci2xc2x7Goptxe2x88x92copt2xc2x7Gixe2x89xa60 of step 112 is not satisfied, then it is checked (step 122) whether the index i is the last index of the codebook. If it is, then loop 102 is exited, and the optimum vector has the index opt. If the index i is not the last index of the codebook, then the index i is moved (step 124) to the next vector in the codebook before the loop 102 is resumed.
As described hereinabove, the method shown in FIG. 2 is appropriate for a 1-dimensional codebook search, in which the application performing the codebook search uses the following method:
Repeat {
codebook search on code vector i
}
However, the method shown in FIG. 2 is also appropriate for 2-dimensional codebook searches, in which the application performing the codebook search uses the following method:
Block Repeat {
various other calculations
codebook search on code vector i
}
where the various other calculations are shown as step 126 in FIG. 2. In the case of a 2-dimensional codebook search, the output of the various other calculations are used in place of the parameters ci and Gi.
In a typical DSP with one multiplier and one arithmetic logic unit (ALU), the method of loop 102, schematically illustrated in FIG. 2, would require at least four clock cycles, and as many as eight clock cycles if a new optimum vector were found. In a DSP with two multipliers and one ALU, the method of loop 102, would require at least three clock cycles, and as many as seven clock cycles if a new optimum vector were found.
An object of the present invention is to provide a digital signal processor (DSP) capable of executing codebook searches, such that the calculation and comparison for each code vector takes two clock cycles only.
There is therefore provided in accordance with a preferred embodiment of the present invention a device for performing a search for the optimum code vector in a codebook having N code vectors indexed by i. The device includes a controller which considers each ith code vector, and a processor which determines in two clock cycles whether the ith code vector is the current optimal code vector.
Moreover, in accordance with a preferred embodiment of the present invention, the processor includes an arithmetic logic unit, and two multipliers.
Furthermore, in accordance with a preferred embodiment of the present invention, the processor further includes a register for storing half of the product of one of the two multipliers.
Additionally, in accordance with a preferred embodiment of the present invention, the processor includes first clock cycle means for generating a first product whose high part is a first parameter of the ith code vector, and if a second product is greater than a third product for the (ixe2x88x921)th code vector, for setting the (ixe2x88x921)th code vector to be a currently optimal code vector. The processor also includes second clock cycle means for generating the second product of the first parameter of the ith code vector and a second parameter of the currently optimal code vector and the third product of a first parameter of the currently optimal code vector and a second parameter of the ith code vector.
Moreover, in accordance with a preferred embodiment of the present invention, the processor further includes means for normalizing the second product and the third product for the ith code vector. This normalization is performed after the second product and the third product for the ith code vector are generated by the second clock cycle means and before the second product and the third product for the ith code vector are compared by the first clock cycle means.
There is also provided in accordance with a preferred embodiment of the present invention a method for selecting the optimum code vector of a codebook having N code vectors indexed by i, each characterized by a first and second parameter. For each ith code vector, the method includes a first clock cycle step and a second clock cycle step. The first clock cycle step is the step of generating a first product whose high part is the first parameter of the ith code vector, and if a second product is greater than a third product for the (ixe2x88x921)th code vector, setting the ((ixe2x88x921)th code vector to be a currently optimal code vector. The second clock cycle step is the step of generating the second product of the first parameter of the ith code vector and a second parameter of the currently optimal code vector and the third product of a first parameter of the currently optimal code vector and a second parameter of the ith code vector.
Moreover, in accordance with a preferred embodiment of the present invention, the method further includes the step of for each ith code vector, normalizing the second product and the third product for the ith code vector after the second clock cycle for the ith code vector and before the first clock cycle for the (i+1)th code vector.